If you are *physicist* and you look at the future of computer architectures, you can think that it's inevitable that sooner or later multi-core computers will adopt an architecture where memory is not shared, each core has its own memory (plus a bit of memory for message caching), and sends messages to other cores. For such hypothetical computer architecture an actor-based programming language is quite fitting. So it's good for D to have something like actors.

But several practical considerations make such model appear unrealistic. So I think a structure closer to the reality will be the same with units that don't share a single memory and send messages to each other. But the units themselves will be composed by several cores that share a single memory (plus caches), and each core will have advanced SIMD instructions (see AVX instructions that perform a kind of vectorized 'if' too).

(Beside such structure there can be something like a GPU, with many more tiny cores, see the recent NVIDIA Tesla.)

So a programming language that wants to be efficient needs to use well such two-level architecture (the Chapel language seem able to adapt to that, it has domains for its memory, etc.). So maybe an actor-like-based concurrency design is not enough. D has array ops that once improved and well implemented can be use SIMD instructions in a good enough way.

Bye,
bearophile

Hello bearophile,

> So I think a structure closer to the reality will be the
> same with units that don't share a single memory and send messages to
> each other. But the units themselves will be composed by several cores
> that share a single memory (plus caches), and each core will have
> advanced SIMD instructions (see AVX instructions that perform a kind
> of vectorized 'if' too).

I'm no expert but that sounds a lot like what I know about current generation super-computers.

-- 
... <IXOYE><

BCS:

> I'm no expert but that sounds a lot like what I know about current generation super-computers.

But I think that architecture will be seen inside PCs in ten years or less :-) It's being years that Intel is able to create a CPUs with 30-80 cores, but it's kind of impossible to keep efficient a single coherently shared memory with that many cores. You need to do as GPUs do. But I think such flat architecture is not so good with a large amount of legacy code and it's not as efficient as possible with tons of partially serial code. So I think you will see the more complex hybrid I have explained. And I think D is not ready yet for such hybrid architecture yet.

Bye,
bearophile