new cpuid is ready for comments

Hello :-) `cpuid` package is core.cpuid analog. It would be used by future D BLAS implementation. Why it is better? See https://github.com/libmir/cpuid#api-features https://github.com/libmir/cpuid#implementation-features https://issues.dlang.org/show_bug.cgi?id=16028 Please report your CPU (GitHub/Gist): ``` dub fetch cpuid dub test cpuid ``` ... AMD was not tested at all and I hope to see your reports. ARM contributors are wanted! Destroy! Best regards, Ilya Docs: http://docs.cpuid.dlang.io GitHub: https://github.com/libmir/cpuid Dub: cpuid

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: > Hello :-) > > `cpuid` package is core.cpuid analog. > It would be used by future D BLAS implementation. > > Why it is better? > See > https://github.com/libmir/cpuid#api-features > https://github.com/libmir/cpuid#implementation-features > https://issues.dlang.org/show_bug.cgi?id=16028 > > Please report your CPU (GitHub/Gist): > > ``` > dub fetch cpuid > dub test cpuid > ``` > ... AMD was not tested at all and I hope to see your reports. > > ARM contributors are wanted! > > Destroy! > > Best regards, > Ilya > > > Docs: http://docs.cpuid.dlang.io > GitHub: https://github.com/libmir/cpuid > Dub: cpuid Looks good! Here are my results (I added a `cat /proc/cpuinfo` for the record) https://gist.github.com/gchatelet/31a8cf41ba1d888c1efaef314d6a0c97

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: > Hello :-) > > `cpuid` package is core.cpuid analog. > It would be used by future D BLAS implementation. Hey Ilya, Quick question: where do the data come from/how reliable do you think they are?

On Tuesday, 12 July 2016 at 12:46:26 UTC, Guillaume Chatelet wrote: > On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: >> Hello :-) >> >> `cpuid` package is core.cpuid analog. >> It would be used by future D BLAS implementation. > > Hey Ilya, > > Quick question: where do the data come from/how reliable do you think they are? Hello Guillaume, The data come from CPUID x86/x86_64 instruction. I have fixed bugs for AMD yesterday. Information for Intel and AMD processors should be reliable. But I am not sure about Cache and TLB information for virtual machines and other vendors. You can use cpuid.x86_any._cpuid [1] to get any information that is not presented. [1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#._cpuid

On Tuesday, 12 July 2016 at 13:23:46 UTC, Ilya Yaroshenko wrote: > On Tuesday, 12 July 2016 at 12:46:26 UTC, Guillaume Chatelet wrote: >> On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: >>> Hello :-) >>> >>> `cpuid` package is core.cpuid analog. >>> It would be used by future D BLAS implementation. >> >> Hey Ilya, >> >> Quick question: where do the data come from/how reliable do you think they are? > > Hello Guillaume, > > The data come from CPUID x86/x86_64 instruction. > I have fixed bugs for AMD yesterday. Information for Intel and AMD processors should be reliable. But I am not sure about Cache and TLB information for virtual machines and other vendors. You can use cpuid.x86_any._cpuid [1] to get any information that is not presented. > > [1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#._cpuid Thx Ilya, I was discussing this a few colleagues. I'm quoting one of them here with his permission: "It doesn't seems that a userland library like this has any possibility to solve the root problem on Android/ARM. It's a twofold problem: 1. On ARM, the registers containing CPU identification and cache structure information, are privileged. See: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344f/Chdebced.html etc... (more such registers listed in the left pane on that page) Thus it is up to the operating system to expose this information to userspace. That takes us to the second part of the problem: 2. As far as I know, Android does not expose either CPU identification or cache structure information to userspace. Please do correct me if I'm wrong and this library found a way around that --- but from a cursory look at the cpuid library code, it does not have an ARM implementation at the moment?"

On Tuesday, 12 July 2016 at 15:24:29 UTC, Guillaume Chatelet wrote: > 2. As far as I know, Android does not expose either CPU identification or cache structure information to userspace. > > Please do correct me if I'm wrong and this library found a way around that --- but from a cursory look at the cpuid library code, it does not have an ARM implementation at the moment?" According to docs: https://developer.android.com/ndk/guides/cpu-features.html Or, probably not recommended or supported: https://github.com/jooink/ndk-cpuid/blob/master/CPUIdApp/jni/com_jooink_experiments_android_ndk_cpuid_CPUIdApp.c

July 12, 2016

Re: new cpuid is ready for comments

Posted by Ilya Yaroshenko
in reply to Guillaume Chatelet

Permalink

Ilya Yaroshenko

Posted in reply to Guillaume Chatelet

Permalink

On Tuesday, 12 July 2016 at 15:24:29 UTC, Guillaume Chatelet wrote:
> On Tuesday, 12 July 2016 at 13:23:46 UTC, Ilya Yaroshenko wrote:
>> On Tuesday, 12 July 2016 at 12:46:26 UTC, Guillaume Chatelet wrote:
>>> On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
>>>> Hello :-)
>>>>
>>>> `cpuid` package is core.cpuid analog.
>>>> It would be used by future D BLAS implementation.
>>>
>>> Hey Ilya,
>>>
>>> Quick question: where do the data come from/how reliable do you think they are?
>>
>> Hello Guillaume,
>>
>> The data come from CPUID x86/x86_64 instruction.
>> I have fixed bugs for AMD yesterday. Information for Intel and AMD processors should be reliable. But I am not sure about Cache and TLB information for virtual machines and other vendors. You can use cpuid.x86_any._cpuid [1] to get any information that is not presented.
>>
>> [1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#._cpuid
>
> Thx Ilya,
>
> I was discussing this a few colleagues. I'm quoting one of them here with his permission:
>
> "It doesn't seems that a userland library like this has any possibility to solve the root problem on Android/ARM. It's a twofold problem:
>
> 1. On ARM, the registers containing CPU identification and cache structure information, are privileged. See:
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344f/Chdebced.html
> etc... (more such registers listed in the left pane on that page)
>
> Thus it is up to the operating system to expose this information to userspace. That takes us to the second part of the problem:
>
> 2. As far as I know, Android does not expose either CPU identification or cache structure information to userspace.
>
> Please do correct me if I'm wrong and this library found a way around that --- but from a cursory look at the cpuid library code, it does not have an ARM implementation at the moment?"

Thank you for the information, I have not know that registers are privileged on ARM! By "other vendors" I mean other x86 vendors listed in enum VendorIndex [1]. ARM is not supported, but API supports complex topology. So ARM direction is to receive approximate information from an OS, like from /proc/cpuinfo on Linux. Just CPU brand name with version is significant information for cache size.

[1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#.VendorIndex

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: > Hello :-) > > `cpuid` package is core.cpuid analog. > It would be used by future D BLAS implementation. > > Why it is better? > See > https://github.com/libmir/cpuid#api-features > https://github.com/libmir/cpuid#implementation-features > https://issues.dlang.org/show_bug.cgi?id=16028 > > Please report your CPU (GitHub/Gist): > > ``` > dub fetch cpuid > dub test cpuid > ``` > ... AMD was not tested at all and I hope to see your reports. > > ARM contributors are wanted! > > Destroy! > > Best regards, > Ilya > > > Docs: http://docs.cpuid.dlang.io > GitHub: https://github.com/libmir/cpuid > Dub: cpuid My report, Intel i5 6600K https://gist.github.com/cifvts/213a1e2ab564274b16a2294312cbd6f4

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote: > Please report your CPU (GitHub/Gist) Running on Mac Pro Intel Xeon Quad-Core x2 https://gist.github.com/Dechcaudron/e6eeb17972316785d7c07c409a2ed092

Intel(R) Xeon(R) CPU X5690 @ 3.47GHz https://gist.github.com/drug007/738f7ce8ba73f4413d11e170ab36c7e3 output for cpuid for VM (VirtualBox) running on Intel(R) Xeon(R) CPU X5690 @ 3.47GHz https://gist.github.com/drug007/76750ba962e84be494b8bf11bd84a3a7 output cpuid for Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz https://gist.github.com/drug007/3f7f0701b3d4f1f40c422acc36e343d7

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