March 14, 2016
On 14 Mar 2016, at 13:14, Kagamin via digitalmars-d-ldc wrote:
> For small projects I compile entire codebase into bitcode and then compile it with llc or llvm-lto. This way llvm handles inlining and llvm-lto does even more :) I would recommend it.

More or less equivalently, you can also use -singleobj (which is the default when using ldmd2). The only difference might be in the tuning parameters of various optimization passes.

 — David
March 14, 2016
On Monday, 14 March 2016 at 13:39:41 UTC, David Nadlinger wrote:
> On 14 Mar 2016, at 13:14, Kagamin via digitalmars-d-ldc wrote:
>> For small projects I compile entire codebase into bitcode and then compile it with llc or llvm-lto. This way llvm handles inlining and llvm-lto does even more :) I would recommend it.
>
> More or less equivalently, you can also use -singleobj (which is the default when using ldmd2). The only difference might be in the tuning parameters of various optimization passes.
>
>  — David

So i think the problem might be something a bit bigger. Not quite sure yet. I know just enough about the cortex-m0+ to be slightly familiar. so what I am seeing is disagreement between dis-assembly of the cortex-m0+ by gcc objdump and the uvision disassembler.

objdump:
00000552 <_D7MKL25Z410SIM_MemMap7SOTP2_t6TPMSRCMFNdhZv>:
 552:	22c0      	movs	r2, #192	; 0xc0
 554:	43d2      	mvns	r2, r2
 556:	6803      	ldr	r3, [r0, #0]
 558:	4013      	ands	r3, r2
 55a:	0189      	lsls	r1, r1, #6
 55c:	b2c9      	uxtb	r1, r1
 55e:	4319      	orrs	r1, r3
 560:	6001      	str	r1, [r0, #0]
 562:	4770      	bx	lr

uvision:
                 SOTP2_t::MKL25Z4.SIM_MemMap.SOTP2_t.TPMSRC:
0x00000552 22C0      DCW      0x22C0
0x00000554 43D2      DCW      0x43D2
0x00000556 6803      DCW      0x6803
0x00000558 4013      DCW      0x4013
0x0000055A 0189      DCW      0x0189
0x0000055C B2C9      DCW      0xB2C9
0x0000055E 4319      DCW      0x4319
0x00000560 6001      DCW      0x6001
0x00000562 4770      DCW      0x4770


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