https://www.allaboutcircuits.com/news/intel-to-introduce-new-cpu-fpga-hybrid-chip-supported-by-acceleration-stack/

is yet another motivation to keep up the great work put into DCompute at

https://github.com/ldc-developers/ldc/commits/dcompute

!

Ever since I first tried programming in VHDL and realized that it, at that time, was far too unproductive for my taste, I've been waiting for the software and FPGA programming models to unite...

What kinds of simplifications (over OpenCL) can and will DCompute offer in this regard?

On Friday, 20 October 2017 at 20:41:24 UTC, Nordlöw wrote:
> https://github.com/ldc-developers/ldc/commits/dcompute

or rather

https://github.com/libmir/dcompute

On Friday, 20 October 2017 at 20:41:24 UTC, Nordlöw wrote:
> Ever since I first tried programming in VHDL and realized that it, at that time, was far too unproductive for my taste, I've been waiting for the software and FPGA programming models to unite...
>
> What kinds of simplifications (over OpenCL) can and will DCompute offer in this regard?

I don't know. It is an interesting development, but I've got a feeling that you have to address the hardware very specifically to get worthwhile performance. My gut feeling is that abstractions would be a bad idea…

So maybe this will be best suited for very narrow domains where you can rely on third party libraries (e.g. statistical signal processing and other fields) or narrow applications that can afford to tune very carefully to the underlying hardware.

But I also get this feeling that Intel do this as an anti-competitive monopolistic. Basically preventing ARM and AMD from partnering with Altera. So it could be more hostile than friendly…

The buy up might not make sense business wise in terms of new products. But it could make a lot of sense to keep other competing products off the table to keep the pricing of Xeons up… A pessimistic view, perhaps… but Intel has a history…

On Friday, 20 October 2017 at 20:41:24 UTC, Nordlöw wrote:
> Ever since I first tried programming in VHDL and realized that it, at that time, was far too unproductive for my taste, I've been waiting for the software and FPGA programming models to unite...
>
> What kinds of simplifications (over OpenCL) can and will DCompute offer in this regard?

Over OpenCL: Same benefits it does over standard C
* a not completely insane interface
* generality and parameterisation
* reusability
* ...

As to how much of the total power of the FPGA you can use from D compared to VHDL remains to be seen, although it will be interesting to see how well this can cooperate with Luís' DHDL.