This happens when I try to name an object file "foo.o" instead of "foo.obj", or when I name an executable "foo.x" instead of "foo.exe"

Can I get SMAKE to stop bugging me about my funny file names and just do what I want?

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"Chris Giese" <NoEmailAds@execpc.com> wrote in message news:3cd3482c.28674366@news.digitalmars.com...
> This happens when I try to name an object file "foo.o" instead of "foo.obj", or when I name an executable "foo.x" instead of "foo.exe"
>
> Can I get SMAKE to stop bugging me about my funny file names and just do what I want?

Unfortunately, SMAKE has too many smarts and defaults in it. Try MAKE.

"Walter" <walter@digitalmars.com> wrote:

>
>"Chris Giese" <NoEmailAds@execpc.com> wrote in message news:3cd3482c.28674366@news.digitalmars.com...
>> This happens when I try to name an object file "foo.o" instead of "foo.obj", or when I name an executable "foo.x" instead of "foo.exe"
>>
>> Can I get SMAKE to stop bugging me about my funny file names and just do what I want?
>
>Unfortunately, SMAKE has too many smarts and defaults in it. Try MAKE.

Does MAKE support recursive makes? I mean, can I call MAKE from inside a makefile? This is what I'm doing:

	MAKEFILE=dmars.mak
	LIBC	=lib\libc.lib

	$(LIBC): lib\$(MAKEFILE)
		cd lib
		make -f $(MAKEFILE)
		cd ..

but it seems to go into some kind of loop.

"Chris Giese" <NoEmailAds@execpc.com> wrote in message news:3cd3589c.32883055@news.digitalmars.com...
> Does MAKE support recursive makes? I mean, can I call MAKE from inside a makefile?

Yes. I do it routinely.

> This is what I'm doing:
>
> MAKEFILE=dmars.mak
> LIBC =lib\libc.lib
>
> $(LIBC): lib\$(MAKEFILE)
> cd lib
> make -f $(MAKEFILE)
> cd ..
>
> but it seems to go into some kind of loop.

The cd may not be working, so it may not pick up the makefile from the subdirectory.