Thread overview
[Issue 8047] important opcodes missing from core/simd.d
Dec 10, 2014
John Colvin
Dec 10, 2014
John Colvin
Dec 10, 2014
Martin Nowak
Oct 03, 2015
Marco Leise
Nov 20, 2016
Walter Bright
Nov 22, 2016
Walter Bright
Nov 22, 2016
Marco Leise
Jan 07
ponce
December 10, 2014
https://issues.dlang.org/show_bug.cgi?id=8047

John Colvin <john.loughran.colvin@gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |john.loughran.colvin@gmail.
                   |                            |com

--- Comment #2 from John Colvin <john.loughran.colvin@gmail.com> ---
Also missing is PCMPGT[SDQ]

Can they just be added to the druntime file or are compiler modifications necessary?

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December 10, 2014
https://issues.dlang.org/show_bug.cgi?id=8047

John Colvin <john.loughran.colvin@gmail.com> changed:

           What    |Removed                     |Added
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           Hardware|All                         |x86_64

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December 10, 2014
https://issues.dlang.org/show_bug.cgi?id=8047

Martin Nowak <code@dawg.eu> changed:

           What    |Removed                     |Added
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                 CC|                            |code@dawg.eu

--- Comment #3 from Martin Nowak <code@dawg.eu> ---
(In reply to John Colvin from comment #2)
> Also missing is PCMPGT[SDQ]
> 
> Can they just be added to the druntime file or are compiler modifications necessary?

Looks like most can simply be added, just have to add the correct opcode.
But PCMPGTQ is already there and works for me on 2.066.1.
https://github.com/D-Programming-Language/druntime/blob/109a604a08c7592687a9b482ac2a8bb8ded80ccc/src/core/simd.d#L3633

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October 03, 2015
https://issues.dlang.org/show_bug.cgi?id=8047

--- Comment #4 from Marco Leise <Marco.Leise@gmx.de> ---
    //PMOVMSKB = 0x660FD7,

has been commented out in core.simd. We may as well comment out all instructions returning non-XMM values until this is resolved. The ones I could find so far are:

COMISD
COMISS
CVTSD2SI
CVTSS2SI
CVTTPD2PI
CVTTPS2PI
CVTTSD2SI
CVTTSS2SI
MASKMOVDQU
MASKMOVQ
MOVMSKPD
MOVMSKPS
PCMPESTRI
PCMPISTRI
PMOVMSKB
PTEST
UCOMISS
UCOMISD

CRC32, POPCNT and LZCNT don't belong in the XMM enum. They were introduced side-by-side with SSE4.2, but don't work on XMM registers and the latter two have their separate CPUID flags.

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October 15, 2016
https://issues.dlang.org/show_bug.cgi?id=8047

Andrei Alexandrescu <andrei@erdani.com> changed:

           What    |Removed                     |Added
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           Keywords|                            |bootcamp
                 CC|                            |andrei@erdani.com

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November 20, 2016
https://issues.dlang.org/show_bug.cgi?id=8047

Walter Bright <bugzilla@digitalmars.com> changed:

           What    |Removed                     |Added
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           Keywords|                            |SIMD
                 CC|                            |bugzilla@digitalmars.com

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November 22, 2016
https://issues.dlang.org/show_bug.cgi?id=8047

Walter Bright <bugzilla@digitalmars.com> changed:

           What    |Removed                     |Added
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             Status|NEW                         |RESOLVED
         Resolution|---                         |WORKSFORME

--- Comment #5 from Walter Bright <bugzilla@digitalmars.com> ---
These have been in core.simd for a while.

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November 22, 2016
https://issues.dlang.org/show_bug.cgi?id=8047

Marco Leise <Marco.Leise@gmx.de> changed:

           What    |Removed                     |Added
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             Status|RESOLVED                    |REOPENED
         Resolution|WORKSFORME                  |---

--- Comment #6 from Marco Leise <Marco.Leise@gmx.de> ---
(In reply to Walter Bright from comment #5)
> These have been in core.simd for a while.

While that is true for the original bug description, the hard issue is not missing enum values themselves, but a lack of support for them, namely returning something else than SIMD vectors as I outlined in comment #1 and #4 above. The XMM enum is still rather messy if you look at it from some distance:

There are some non-SSE opcodes in it as noted in their comment (i.e. POPCNT and LZCNT have nothing to do with SSE). They should be handled in core.bitop instead, IMHO.

Some non-working opcodes are rightfully commented out until this bug is
resolved (i.e. PMOVMSKB).

Other non-working opcodes are NOT commented out (i.e. MOVMSKPD from the original description, see comment #4 for a list).

AMD's SSE4a seems to have an undecided fate with its opcodes commented out in entirety. This may be consider a separate bug, but then again, whoever works on this bug will probably look at them as well.

The ddoc for XMM still says: "XMM opcodes that conform to the following: opcode xmm1,xmm2/mem and do not have side effects (i.e. do not write to memory)." This description doesn't apply to e.g. CRC32 or PREFETCH.

DMD + core.simd still need some work to move SIMD support out of proof-of-concept phase. Admittedly I didn't run any tests since 2015, so if any of the above is in good shape now, shame on me. :)

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January 07
https://issues.dlang.org/show_bug.cgi?id=8047

ponce <aliloko@gmail.com> changed:

           What    |Removed                     |Added
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                 CC|                            |aliloko@gmail.com

--- Comment #7 from ponce <aliloko@gmail.com> ---
Hello,

Can't implement the following intrinsics for DMD:

_mm_movemask_ps needs MOVMSKPS support, as Marco Leise said 7 years ago it is an instruction that return in a general purpose register instead of an XMM register.

----------------------------------------------------
int _mm_movemask_ps (__m128 a) pure @trusted
{
    static if (DMD_with_DSIMD)
    {
        // suggested API ? This API returning an int doesn't exist in core.simd
        int res =  __simd_int(XMM.MOVMSKPS, a);
        return res;
    }
    else static if (GDC_with_SSE)
    {
        return __builtin_ia32_movmskps(a);
    }
    else static if (LDC_with_SSE1)
    {
        return __builtin_ia32_movmskps(a);
    }
    else
    {
        int4 ai = cast(int4)a;
        int r = 0;
        if (ai.array[0] < 0) r += 1;
        if (ai.array[1] < 0) r += 2;
        if (ai.array[2] < 0) r += 4;
        if (ai.array[3] < 0) r += 8;
        return r;
    }
}
----------------------------------------------------


Same remark for:
- _mm_movemask_epi8 (pmovmskb),
- _mm_movemask_pd (movmskpd),

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