January 27, 2002 sc -d | ||||
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sc.html: ======================== -d Generate dependency information If file.c is being compiled, then file.dep will be created. It will contain a list of #include files that file.obj depends on. So, the line in the makefile can be written as: file.obj : $(file.dep) file.c sc -c file -d ======================== How can I use -d with implicit rules e.g. : c.obj:: $(CPP) $(CPP_OPTS) $< ??? I mean, I would like to simplify huge makefiles full of : .. SOURCE=..\..\Src\Audio\SDL_audiocvt.c DEP_CPP_SDL_AUD=\ "..\..\include\begin_code.h"\ "..\..\include\close_code.h"\ "..\..\include\sdl_audio.h"\ "..\..\include\sdl_byteorder.h"\ "..\..\include\sdl_error.h"\ "..\..\include\sdl_main.h"\ "..\..\include\sdl_rwops.h"\ "..\..\include\sdl_types.h"\ "$(INTDIR)\SDL_audiocvt.obj" : $(SOURCE) $(DEP_CPP_SDL_AUD) "$(INTDIR)" $(CPP) $(CPP_PROJ) $(SOURCE) .. is the simplest form : SOURCE=..\..\Src\Audio\SDL_audiocvt.c "$(INTDIR)\SDL_audiocvt.obj" : $(SOURCE) $*.dep "$(INTDIR)" $(CPP) $(CPP_PROJ) $(SOURCE) ??? The sc -d does not indicate where is put the generated .dep file. It is in the directory where the makefile is run. (Should not that be documented ?, and/or it should possible to indicate where the file is to be put ? (default: with the .c ?)) TIA Jean-Pierre Dumas |
January 27, 2002 Re: sc -d | ||||
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Posted in reply to Jean-Pierre H. Dumas | There also is a separate utility by the name of makedep that does this for you. I have a modified version of makedep.exe named DEP.EXE for Win32 at: ftp://ftp.janknepper.com/Win32/DEP.EXE Jan "Jean-Pierre H. Dumas" wrote: > sc.html: > ======================== > -d Generate dependency information > > If file.c is being compiled, then file.dep will be created. > It will contain a list of #include files that file.obj depends > on. So, the line in the makefile can be written as: > > file.obj : $(file.dep) file.c > sc -c file -d > ======================== > > How can I use -d with implicit rules e.g. : > c.obj:: > $(CPP) $(CPP_OPTS) $< > > ??? > > I mean, I would like to simplify huge makefiles full of : > > .. > SOURCE=..\..\Src\Audio\SDL_audiocvt.c > DEP_CPP_SDL_AUD=\ > "..\..\include\begin_code.h"\ > "..\..\include\close_code.h"\ > "..\..\include\sdl_audio.h"\ > "..\..\include\sdl_byteorder.h"\ > "..\..\include\sdl_error.h"\ > "..\..\include\sdl_main.h"\ > "..\..\include\sdl_rwops.h"\ > "..\..\include\sdl_types.h"\ > > > "$(INTDIR)\SDL_audiocvt.obj" : $(SOURCE) $(DEP_CPP_SDL_AUD) "$(INTDIR)" > $(CPP) $(CPP_PROJ) $(SOURCE) > .. > > is the simplest form : > > SOURCE=..\..\Src\Audio\SDL_audiocvt.c > > "$(INTDIR)\SDL_audiocvt.obj" : $(SOURCE) $*.dep "$(INTDIR)" > $(CPP) $(CPP_PROJ) $(SOURCE) > ??? > > The sc -d does not indicate where is put the generated .dep file. > It is in the directory where the makefile is run. > (Should not that be documented ?, and/or it should possible to > indicate where the file is to be put ? (default: with the .c ?)) > > TIA > > Jean-Pierre Dumas |
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