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April 01, 2005 FISTTP Instructiion Missing | ||||
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The asm {} in D is quite handy, but it seems that the FISTTP instruction is missing. This one shouln't be too tricky to implement. ; ) |
April 02, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to Bob W | "Bob W" <nospam@aol.com> wrote in message news:d2k694$1c8c$1@digitaldaemon.com... > > The asm {} in D is quite handy, but it seems > that the FISTTP instruction is missing. This > one shouln't be too tricky to implement. The FISTTP instruction doesn't appear in the Intel data sheets. Perhaps you mean FISTP? |
April 02, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to Walter | "Walter" <newshound@digitalmars.com> wrote in message news:d2koue$1tm0$1@digitaldaemon.com... > > "Bob W" <nospam@aol.com> wrote in message news:d2k694$1c8c$1@digitaldaemon.com... >> >> The asm {} in D is quite handy, but it seems >> that the FISTTP instruction is missing. This >> one shouln't be too tricky to implement. > > The FISTTP instruction doesn't appear in the Intel data sheets. Perhaps > you > mean FISTP? > > No, as opposed to FISTP, FISTTP bypasses rounding when storing integers, so rounding flags can be left untouched when a truncated result is desired. Can be found in the following PDF file: IA-32 Intel® Architecture Software Developer’s Manual Volume 2A: Instruction Set Reference, A-M 2004 FISTTP: Store Integer with Truncation Description: FISTTP converts the value in ST into a signed integer using truncation (chop) as rounding mode, transfers the result to the destination, and pops ST. FISTTP accepts word, short integer, and long integer destinations. |
April 02, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to Bob W | "Bob W" <nospam@aol.com> wrote in message news:d2l0d4$23il$1@digitaldaemon.com... > No, as opposed to FISTP, FISTTP bypasses rounding > when storing integers, so rounding flags can be left > untouched when a truncated result is desired. Hmm, must be a new one. > > Can be found in the following PDF file: > > IA-32 Intel® Architecture > Software Developer's Manual > Volume 2A: > Instruction Set Reference, A-M > 2004 > > > FISTTP: Store Integer with Truncation > > Description: > FISTTP converts the value in ST into a signed > integer using truncation (chop) as rounding mode, > transfers the result to the destination, and pops ST. > FISTTP accepts word, short integer, and long > integer destinations. > > > |
April 02, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to Walter | I believe FISTTP is an SSE3 instruction and not (yet) supported by DMC In article <d2l64r$283h$1@digitaldaemon.com>, Walter says... > > >"Bob W" <nospam@aol.com> wrote in message news:d2l0d4$23il$1@digitaldaemon.com... >> No, as opposed to FISTP, FISTTP bypasses rounding >> when storing integers, so rounding flags can be left >> untouched when a truncated result is desired. > >Hmm, must be a new one. > >> >> Can be found in the following PDF file: >> >> IA-32 Intel® Architecture >> Software Developer's Manual >> Volume 2A: >> Instruction Set Reference, A-M >> 2004 >> >> >> FISTTP: Store Integer with Truncation >> >> Description: >> FISTTP converts the value in ST into a signed >> integer using truncation (chop) as rounding mode, >> transfers the result to the destination, and pops ST. >> FISTTP accepts word, short integer, and long >> integer destinations. >> >> >> > > |
April 02, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to pvmoore | I found it in the Pentium 4 manuals (it was new for that processor). It's added now to the inline assembler. "pvmoore" <pvmoore_member@pathlink.com> wrote in message news:d2mtp5$tpk$1@digitaldaemon.com... > I believe FISTTP is an SSE3 instruction and not (yet) supported by DMC |
April 03, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to Walter | Excellent. Does this mean that the other SSE3 instructions have been added too? ADDSUBPD ADDSUBPS HADDPD HSUBPD HADDPS HSUBPS LDDQU MOVDDUP MOVSHDUP MOVSLDUP MONITOR MWAIT It would be nice to have the full set :) And will they be available to use in DMD 0.120? In article <d2n7fg$168h$2@digitaldaemon.com>, Walter says... > >I found it in the Pentium 4 manuals (it was new for that processor). It's added now to the inline assembler. > >"pvmoore" <pvmoore_member@pathlink.com> wrote in message news:d2mtp5$tpk$1@digitaldaemon.com... >> I believe FISTTP is an SSE3 instruction and not (yet) supported by DMC > > |
April 03, 2005 Re: FISTTP Instructiion Missing | ||||
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Posted in reply to pvmoore | "pvmoore" <pvmoore_member@pathlink.com> wrote in message news:d2onbq$2dqi$1@digitaldaemon.com... > Does this mean that the other SSE3 instructions have been added too? > > ADDSUBPD > ADDSUBPS > HADDPD > HSUBPD > HADDPS > HSUBPS > LDDQU > MOVDDUP > MOVSHDUP > MOVSLDUP > MONITOR > MWAIT Yes. > It would be nice to have the full set :) I agree. > And will they be available to use in DMD 0.120? Yes. The next DMC++ too. |
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