== Quote from Christof Boeckler (post06@jamesie.de)'s article
> kmk schrieb:
> > "I did that last night and it looks to be fixed already."
> >
> > Yes, D is back to #3
> Strange though that on the AMD Sempron machine (see http://shootout.alioth.debian.org/debian/) DMC is even #1 with quite a gap between C and C++.
> > I tried to get them to add GDC but they said it was too much work.

Yeah, D has always seemed to do better on AMD processors.

kmk wrote:
> == Quote from Christof Boeckler (post06@jamesie.de)'s article
>> kmk schrieb:
>>> "I did that last night and it looks to be fixed already."
>>>
>>> Yes, D is back to #3
>> Strange though that on the AMD Sempron machine (see
>> http://shootout.alioth.debian.org/debian/) DMC is even #1 with quite a
>> gap between C and C++.
>>> I tried to get them to add GDC but they said it was too much work.
> 
> Yeah, D has always seemed to do better on AMD processors.

Maybe Walter uses AMD and uses measurements on his dev PC for optimization decisions? :)

Frits van Bommel wrote:
> kmk wrote:
>> == Quote from Christof Boeckler (post06@jamesie.de)'s article
>>> kmk schrieb:
>>>> "I did that last night and it looks to be fixed already."
>>>>
>>>> Yes, D is back to #3
>>> Strange though that on the AMD Sempron machine (see
>>> http://shootout.alioth.debian.org/debian/) DMC is even #1 with quite a
>>> gap between C and C++.
>>>> I tried to get them to add GDC but they said it was too much work.
>>
>> Yeah, D has always seemed to do better on AMD processors.
> 
> Maybe Walter uses AMD and uses measurements on his dev PC for optimization decisions? :)

I think it's because AMD has a shorter pipeline (like the Intel PIII and new Intel Core 2) and isn't so sensitive to cache alignment issues, etc. The DMC backend optimizer was probably last enhanced when the PIII was the hot chip <g>

Funny thing is that since Walter didn't chase the P4, now his compiler optimizer might sitting pretty for Core 2 :)

Anyone running a Core 2 system and have a little time? Might be interesting...

Dave wrote:
> Frits van Bommel wrote:
>> kmk wrote:
>>> == Quote from Christof Boeckler (post06@jamesie.de)'s article
>>>> kmk schrieb:
>>>>> "I did that last night and it looks to be fixed already."
>>>>>
>>>>> Yes, D is back to #3
>>>> Strange though that on the AMD Sempron machine (see
>>>> http://shootout.alioth.debian.org/debian/) DMC is even #1 with quite a
>>>> gap between C and C++.
>>>>> I tried to get them to add GDC but they said it was too much work.
>>>
>>> Yeah, D has always seemed to do better on AMD processors.
>>
>> Maybe Walter uses AMD and uses measurements on his dev PC for optimization decisions? :)
> 
> I think it's because AMD has a shorter pipeline (like the Intel PIII and new Intel Core 2) and isn't so sensitive to cache alignment issues, etc. The DMC backend optimizer was probably last enhanced when the PIII was the hot chip <g>
> 
> Funny thing is that since Walter didn't chase the P4, now his compiler optimizer might sitting pretty for Core 2 :)
> 
> Anyone running a Core 2 system and have a little time? Might be interesting...

The Shootout appears to be using different implementations for the Pentium 4 and Sempron benchmarks. Compare the programs at the following URLs:

http://shootout.alioth.debian.org/debian/benchmark.php?test=regexdna&lang=dlang

http://shootout.alioth.debian.org/gp4/benchmark.php?test=regexdna&lang=dlang

One is using std.regexp, and the other isn't.

Dave wrote:
> Frits van Bommel wrote:
>> kmk wrote:
>>> == Quote from Christof Boeckler (post06@jamesie.de)'s article
>>>> kmk schrieb:
>>>>> "I did that last night and it looks to be fixed already."
>>>>>
>>>>> Yes, D is back to #3
>>>> Strange though that on the AMD Sempron machine (see
>>>> http://shootout.alioth.debian.org/debian/) DMC is even #1 with quite a
>>>> gap between C and C++.
>>>>> I tried to get them to add GDC but they said it was too much work.
>>>
>>> Yeah, D has always seemed to do better on AMD processors.
>>
>> Maybe Walter uses AMD and uses measurements on his dev PC for optimization decisions? :)
> 
> I think it's because AMD has a shorter pipeline (like the Intel PIII and new Intel Core 2) and isn't so sensitive to cache alignment issues, etc. The DMC backend optimizer was probably last enhanced when the PIII was the hot chip <g>
> 
> Funny thing is that since Walter didn't chase the P4, now his compiler optimizer might sitting pretty for Core 2 :)

Ironic. But IMHO, the P4's a horrible chip, and was never going to be the basis for future CPUs. Driven by marketing (highest clock speed at all costs, even though it makes it slower). Did awful things to the x87 performance, too.

> Anyone running a Core 2 system and have a little time? Might be interesting...

Don Clugston wrote:
> 
> Ironic. But IMHO, the P4's a horrible chip, and was never going to be the basis for future CPUs. Driven by marketing (highest clock speed at all costs, even though it makes it slower). Did awful things to the x87 performance, too.

Yup.  I never understood all the hype, when the P4 actually performed slower than the P3.  I think the P4 was probably responsible for Intel losing a lot of market share to AMD.


Sean