http://d.puremagic.com/issues/show_bug.cgi?id=6459

           Summary: Inline assembler does not work well for 64 bit
                    registers R8..R15
           Product: D
           Version: D1
          Platform: x86_64
        OS/Version: Linux
            Status: NEW
          Severity: normal
          Priority: P2
         Component: DMD
        AssignedTo: nobody@puremagic.com
        ReportedBy: grahamc001uk@yahoo.co.uk


--- Comment #0 from Graham <grahamc001uk@yahoo.co.uk> 2011-08-09 04:49:51 PDT ---
The inline assembler does not work very well if the registers R8..R15 are used.

Some instructions such as mov RAX,[RBX+1*R13] generate working code.

The compiler does not accept mov RAX,[R13]

Other variations such as mov RAX,[0+1*R11] generate the wrong code (generates an instruction for RBX instead of R11).

Compiler version:
DMD64 D Compiler v1.069

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Graham <grahamc001uk@yahoo.co.uk> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|D1                          |D1 & D2


--- Comment #1 from Graham <grahamc001uk@yahoo.co.uk> 2011-08-31 10:08:18 PDT ---
DMD64 D Compiler v2.054 has exactly the same problem.

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Brad Roberts <braddr@puremagic.com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |braddr@puremagic.com


--- Comment #2 from Brad Roberts <braddr@puremagic.com> 2011-08-31 10:13:56 PDT ---
I suspect this is already fixed in git and will go out with the next release.

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--- Comment #3 from Graham <grahamc001uk@yahoo.co.uk> 2011-09-11 04:28:05 PDT ---
The above still present in v2.055

I also notice if you do:

and RAX,0x00000000FFFFFFFF

the compiler accepts it but generates:

and RAX,0xFFFFFFFFFFFFFFFF

because, of course, there is no imm64 mode for and/or etc. instructions.
Same applies for all other immediate constants that can be encoded into 8 bits.

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--- Comment #4 from Graham <grahamc001uk@yahoo.co.uk> 2011-09-11 09:48:23 PDT ---
Another negative immediate value issue:

mov        EAX,-2;                /* line 1 */
mov        EAX,0xFFFFFFFE;            /* line 2 */
mov        EAX,0xFFFFFFFFFFFFFFFE;        /* line 3 */
mov        R8D,-2;                /* line 4 */
mov        R8D,0xFFFFFFFE;            /* line 5 */
mov        R8D,0xFFFFFFFFFFFFFFFE;        /* line 6 */

Anybody writing line 3 or 6 has probably made a mistake, but line 3 is accepted as equivalent to 1 and 2, and line 6 is accepted as equivalent to 4 and 5 (as 32 bit loads clear the top 32 bits of the equivalent 64 bit register they do not sign extend).

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