The only reference I found was this thread from 11 years ago: https://forum.dlang.org/post/mailman.1953.1380926372.1719.digitalmars-d@puremagic.com

I'd argue that if there aren't many middle endian architecture, it'd be worth not supporting them, in exchange for only having to deal with two byte orders (rather than all possible permutations), so the specification should mandate that either LittleEndian or BigEndian be set to true.

On Mon, Jun 30, 2025 at 02:46:03AM +0000, Valentino Giudice via Digitalmars-d wrote:
> The only reference I found was this thread from 11 years ago: https://forum.dlang.org/post/mailman.1953.1380926372.1719.digitalmars-d@puremagic.com
> 
> I'd argue that if there aren't many middle endian architecture, it'd be worth not supporting them, in exchange for only having to deal with two byte orders (rather than all possible permutations), so the specification should mandate that either LittleEndian or BigEndian be set to true.

What is a middle endian architecture?  First time I've heard of it.


--T

On Monday, 30 June 2025 at 04:21:16 UTC, H. S. Teoh wrote:
> On Mon, Jun 30, 2025 at 02:46:03AM +0000, Valentino Giudice via Digitalmars-d wrote:
>> The only reference I found was this thread from 11 years ago: https://forum.dlang.org/post/mailman.1953.1380926372.1719.digitalmars-d@puremagic.com
>> 
>> I'd argue that if there aren't many middle endian architecture, it'd be worth not supporting them, in exchange for only having to deal with two byte orders (rather than all possible permutations), so the specification should mandate that either LittleEndian or BigEndian be set to true.
>
> What is a middle endian architecture?  First time I've heard of it.

Yeah, sounds more like a late Aprils fool, born from the programming style to not put either of big- or little-endian at the else path but instead provide a third path with assert(0).
This style doesn't imply that such a third path really exist (as a useful case) but only provides a clear error path.

On Monday, 30 June 2025 at 04:21:16 UTC, H. S. Teoh wrote:
> On Mon, Jun 30, 2025 at 02:46:03AM +0000, Valentino Giudice via Digitalmars-d wrote:
>> The only reference I found was this thread from 11 years ago: https://forum.dlang.org/post/mailman.1953.1380926372.1719.digitalmars-d@puremagic.com
>> 
>> I'd argue that if there aren't many middle endian architecture, it'd be worth not supporting them, in exchange for only having to deal with two byte orders (rather than all possible permutations), so the specification should mandate that either LittleEndian or BigEndian be set to true.
>
> What is a middle endian architecture?  First time I've heard of it.

From memory, it was something that the VAX (or possibly PDP-11) did.

For a 32bit value, the in memory representation had two 16bit values of one endianess, but their order in memory was the opposite of that expected.  Here we go, wikipedia has a reference:

https://en.wikipedia.org/wiki/Endianness#Middle-endian