On 09/01/2025 1:01 AM, Jin wrote:
> On Wednesday, 8 January 2025 at 11:37:48 UTC, Richard (Rikki) Andrew Cattermole wrote:
>> Dmd will not inline functions with inline assembly, any function calls should prevent reordering cpu side.
>>
>> So any concern for ordering you have shouldn't matter for dmd, its ldc and gdc that you need to be worried about.
> 
> Visible reordering can occur due to the asynchronous nature of inter- core communication, which is relevant for ARM and other architectures.
> 
> So it looks like we need macros that will insert inline opcodes for memory barriers:
> 
> ```d
> writeToBuffer;
> mixin(Store_Store);
> writeToOffset;
> ```
> 
> ```d
> readFromBuffer;
> mixin(Load_Store);
> writeToOffset;
> ```

Not macros, what you want is intrinsics, this is how core.atomics works for ldc/gdc.

In this case ``atomicFence``.

https://dlang.org/phobos/core_atomic.html#.atomicFence