On Friday, 15 July 2016 at 12:10:22 UTC, Claude wrote:
> On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
>> [...]
>
> What exactly do you need for ARM architecture?
> I have an ARM target and I have tried to run a library[1] to get some CPU info.
>
> I hacked in the source files to just build and link the CPU info code. I used an arm-gcc toolchain (I don't know how to cross-compile using ldc... yet). And it's built on a native Linux OS.
>
> And it seems to work.
> Here's the output I have after running the code:
> https://gist.github.com/claudemr/98b5a4bb83e8d967b31a3044e4d81c0f
>
> Most of it is C code. There is some ARM assembly code, some of which is inlined, and some is in a ".S" file to test specific instructions.
>
> Is it what you're looking for?

Yes! Finally we need the final code for LDC, it support ARM assembler.
http://wiki.dlang.org/LDC_inline_assembly_expressions

>
> [1] It's called "Yeppp", and looks like what you want to do with MIR: http://www.yeppp.info/
> Have you come across it?

No, I have not. Thank you for the link!

On Mon, Jul 11, 2016 at 04:30:44PM +0000, Ilya Yaroshenko via Digitalmars-d-announce wrote: [...]
> Please report your CPU (GitHub/Gist):
> 
> ```
> dub fetch cpuid
> dub test cpuid
> ```
> ... AMD was not tested at all and I hope to see your reports.
[...]

AMD Phenom(tm) II X6 1055T Processor (hexacore):
https://gist.github.com/quickfur/801c2ee6549194d7a9ccbd024ab60aaa


T

-- 
Once the bikeshed is up for painting, the rainbow won't suffice. -- Andrei Alexandrescu

On Friday, 15 July 2016 at 15:05:53 UTC, Ilya Yaroshenko wrote:
> On Friday, 15 July 2016 at 12:10:22 UTC, Claude wrote:
>> [...]
>
> Yes! Finally we need the final code for LDC, it support ARM assembler.
> http://wiki.dlang.org/LDC_inline_assembly_expressions
>
>> [...]
>
> No, I have not. Thank you for the link!

I uploaded the code I used from Yeppp there:
https://github.com/claudemr/cputest

It's a bit of the mess as it is, but it works, and it looks like there is a thorough test of what features ARM hardware may provide.

On Tuesday, 12 July 2016 at 15:24:29 UTC, Guillaume Chatelet wrote:
> On Tuesday, 12 July 2016 at 13:23:46 UTC, Ilya Yaroshenko wrote:
>> On Tuesday, 12 July 2016 at 12:46:26 UTC, Guillaume Chatelet wrote:
>>> On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
>>>> Hello :-)
>>>>
>>>> `cpuid` package is core.cpuid analog.
>>>> It would be used by future D BLAS implementation.
>>>
>>> Hey Ilya,
>>>
>>> Quick question: where do the data come from/how reliable do you think they are?
>>
>> Hello Guillaume,
>>
>> The data come from CPUID x86/x86_64 instruction.
>> I have fixed bugs for AMD yesterday. Information for Intel and AMD processors should be reliable. But I am not sure about Cache and TLB information for virtual machines and other vendors. You can use cpuid.x86_any._cpuid [1] to get any information that is not presented.
>>
>> [1] http://docs.cpuid.dlang.io/latest/cpuid_x86_any.html#._cpuid
>
> Thx Ilya,
>
> I was discussing this a few colleagues. I'm quoting one of them here with his permission:
>
> "It doesn't seems that a userland library like this has any possibility to solve the root problem on Android/ARM. It's a twofold problem:
>
> 1. On ARM, the registers containing CPU identification and cache structure information, are privileged. See:
> http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344f/Chdebced.html
> etc... (more such registers listed in the left pane on that page)
>
> Thus it is up to the operating system to expose this information to userspace. That takes us to the second part of the problem:
>
> 2. As far as I know, Android does not expose either CPU identification or cache structure information to userspace.
>
> Please do correct me if I'm wrong and this library found a way around that --- but from a cursory look at the cpuid library code, it does not have an ARM implementation at the moment?"

On Linux/ARM, Linux/PPC, etc. you have to use getauxval(): https://github.com/dlang/druntime/blob/master/src/core/sys/linux/sys/auxv.d
See https://lwn.net/Articles/519085/ for background information.

Regards,
Kai

Output cpuid for Intel(R) Core(TM) i5-3320M CPU @ 2.6 GHz:
https://gist.github.com/redstar/a1c9c85f17f2c24834050b5b0b734d3d

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
> Please report your CPU (GitHub/Gist):

my results for Intel Core i7-6700K CPU @ 4.00GHz rev.2 (the one with sgx)

https://gist.github.com/Zoadian/f53d818e714a849ba7f34bbec2f3339a

awesome!

On Monday, 11 July 2016 at 16:30:44 UTC, Ilya Yaroshenko wrote:
> Hello :-)
>
> `cpuid` package is core.cpuid analog.
> It would be used by future D BLAS implementation.
>
> Why it is better?
> See
> https://github.com/libmir/cpuid#api-features
> https://github.com/libmir/cpuid#implementation-features
> https://issues.dlang.org/show_bug.cgi?id=16028
>
> Please report your CPU (GitHub/Gist):
>
> ```
> dub fetch cpuid
> dub test cpuid
> ```
> ... AMD was not tested at all and I hope to see your reports.
>
> ARM contributors are wanted!
>
> Destroy!
>
> Best regards,
> Ilya
>
>
> Docs: http://docs.cpuid.dlang.io
> GitHub: https://github.com/libmir/cpuid
> Dub: cpuid

Also: Intel(R) Atom(TM) CPU 230 @ 1.60GHz
https://gist.github.com/gchatelet/d3d347e4630ec2567eae7fe0391a9316