Thread overview
[dmd-internals] dmd commit, revision 558
Jun 24, 2010
dsource.org
Jun 24, 2010
Trass3r
Jun 24, 2010
Walter Bright
Jun 25, 2010
Trass3r
Jun 24, 2010
Jason House
June 24, 2010
dmd commit, revision 558


user: walter

msg:
64

http://www.dsource.org/projects/dmd/changeset/558

June 24, 2010
I saw this commit adds some XMM0..XMM7 code.
What about XMM8..XMM15?
AMD introduced these 8 additional registers with their SSE2 implementation
in 2003 and Intel adopted it with Intel64 in 2004 already.
June 24, 2010
568	 	#define REGMAX  17      // registers are numbered 0..10
 	568	#define REGMAX  29      // registers are numbered 0..10


It looks like this comment has been out of date for several revisions... Time to delete it?

Sent from my iPhone

On Jun 24, 2010, at 4:52 PM, "dsource.org" <noreply at dsource.org> wrote:

> dmd commit, revision 558
> 
> 
> user: walter
> 
> msg:
> 64
> 
> http://www.dsource.org/projects/dmd/changeset/558
> 
> _______________________________________________
> dmd-internals mailing list
> dmd-internals at puremagic.com
> http://lists.puremagic.com/mailman/listinfo/dmd-internals
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June 24, 2010

Trass3r wrote:
> I saw this commit adds some XMM0..XMM7 code.
> What about XMM8..XMM15?
> AMD introduced these 8 additional registers with their SSE2
> implementation in 2003 and Intel adopted it with Intel64 in 2004 already.
>

They won't fit in the 32 bit mask. I haven't decided how to deal with it yet.
June 25, 2010
> They won't fit in the 32 bit mask. I haven't decided how to deal with it yet.

Ah I see.